Sandisk taped out its first High Bandwidth Flash memory die and put the picture on a slide at its August 13 investor day, listing first HBF inference product samples for 2027 and production for 2028. Ten days earlier the company had published the first HBF technical specification through the Open Compute Project alongside SK hynix, six months after the workstream convened in Milpitas. The specification covers 8-high and 16-high NAND stacks reaching 512GB across three bandwidth grades running from roughly 0.4 to 3.0 TB/s. Generation one targets 512GB per stack, built from sixteen 256Gb die, at 1.6 TB/s. The published roadmap runs to more than 2 TB/s and 1TB per stack at generation two, and past 3.2 TB/s and 1.5TB at generation three, each at lower power than the last.
The number the sell side took away is capacity: eight to sixteen times HBM in a package that matches HBM4’s footprint, stack height and power profile, at comparable cost. That figure is carrying more weight than it can bear, and the way it fails is more useful than the way it succeeds.
Eight to sixteen times is a TLC number. It assumes three bits stored per cell, which is where NAND’s density advantage over DRAM actually lives. Every serious independent workload study of HBF published this year reaches the same conclusion about what happens when you put a real inference workload on top of that assumption, which is that the write volume destroys it. A GPU in a prefill cluster writes on the order of 22TB of KV cache per day and one in a decode cluster closer to 27TB. Single-level cell flash, one bit per cell, sustains roughly 55 program-erase cycles per day across a five-year life, which gives a 1TB device something like 55TB of daily write budget. That clears the workload, but by a factor of two, not a factor of ten. TLC does not clear it at all. The characterization work that reports the strongest HBF results, better than two and a half times the throughput of an HBM-only GPU, gets there by committing the entire tier to SLC. SLC is a quarter of TLC’s density.
So the capacity advantage that justifies the tier is roughly two to four times, not eight to sixteen. That is the bear reading and it is correct on the product. The inversion is what it means for bits. Every usable gigabyte of SLC HBF consumes four times the NAND cells of a gigabyte of TLC. The version of this technology that survives contact with a KV cache is the version that quadruples wafer consumption per unit of delivered capacity. The capacity claim and the bit-demand claim are the same claim viewed from opposite ends of the stack, and the more the first one shrinks under scrutiny the larger the second one gets. A tier that ships at TLC is a good product and a modest demand event. A tier that ships at SLC is a mediocre product and a structural demand event arriving into a market where supply growth is already capped near 17 percent and where Samsung has committed the majority of its V-NAND output to Nvidia’s network-attached flash platform, itself forecast to pull NAND consumption from 35 million terabytes this year past 100 million next.
The physics constraints are not in dispute and SK hynix has published them against its own product. Access latency is microseconds against HBM’s nanoseconds, write endurance is bounded near a hundred thousand cycles, and power runs up to four times HBM’s. None of that improves with process generations, because microsecond read latency comes from charge sensing in the array rather than from interconnect slack. The consequence is that HBF never becomes memory in the load-store sense. It becomes a prefetch-driven tier whose entire value depends on software hiding the latency, and the same studies that produce the throughput gains show that stripping out prefetching and layout optimization drops HBF below an HBM-based GPU outright. Adoption is therefore gated on the runtime, and Nvidia owns the runtime. Nvidia also has a direct reason to prefer its own answer, which keeps flash off the interposer entirely: advanced packaging area is the scarcest input in the industry, a 512GB NAND stack occupies beachfront that would otherwise carry HBM, and the CoWoS supply gap is only forecast to narrow from around 20 percent to around 10 percent by year end. The first HBF silicon in production is more likely to sit next to an accelerator designed by a company that wants out of its HBM dependency than next to one designed by the company selling the dependency. Google and Tenstorrent joining the consortium during standardization is the tell.
The moat question does not resolve in the specification, because the specification is open by design. Sandisk and SK hynix published it through OCP precisely to make it the default, which means Samsung and Kioxia can implement against it. What is not open is the manufacturing structure underneath: CMOS bonded array lets the logic wafer and the cell array advance on separate roadmaps, which is what makes a controller-bearing base die under sixteen stacked NAND layers tractable at all, and it is the same structural advantage that lets Sandisk run roughly $674M of net property against a $20B revenue base through the Kioxia joint venture. That asset-light position is the durable competitive fact, not HBF.
For the equity, HBF is not in the 2027 model and should not be. The company guided mid-to-high-teens revenue growth for fiscal 2028 through 2030 with adjusted gross margins near 80 percent, and that guide rests on the new business model contracts with eight customers including three U.S. hyperscalers, on floor pricing rather than on a tier that has not sampled. The bull case is that HBF converts an optional 2029 story into a contracted one and re-rates the multiple on bit demand rather than on ASP. The bear case is the cohort case: if HBM capacity expansion outruns inference demand, the intermediate tier that exists only because HBM is scarce stops being necessary, and every name levered to it derates together. The company’s own simulation, that four HBF-equipped GPUs match the token output of eight HBM-based ones, is a vendor number and should be treated as one.
What settles it is not layer counts or bandwidth grades. It is which cell mode the 2027 samples ship in. SLC confirms the demand thesis and undercuts the product pitch. TLC does the reverse.
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